Job description

Employment Conditions

Permanent employment

Full time

Work Location

2 Robert Speck Parkway suite 750Mississauga, ONL4Z 1H8

On site

 Work must be completed at the physical location. There is no option to work remotely.

Wage

100,000 to 160,000 annually depending on experience and skills

40 hours per Week

Benefits

Health benefits

Languages

English

Education

• Bachelor's degree

Experience

5 years or more

Supervision

• 1 to 2 people

Job Roles - 

• Analyze user requirements, design and develop system architecture and specifications for IPs, ASICs and SoC designs.
• Lead and coordinate teams of design professionals in the development and integration of system architecture and hardware
• Lead and co-ordinate teams of engineers, technologists, technicians and drafters in the design and development of computer and telecommunications hardware
• Research, design, develop and integrate computer and telecommunications hardware
• Lead the complete DFT solutions in a chip design by working with chip DFT team to document DFT specifications
• Develop RTL and integrate internal/external RTL logic into SoC (System-On-Chip)
• Develop and conduct design verification simulations and prototype bench tests of components, and verify the design features
• Building IP/block and SoC level scan insertion flows and scripting ATPG retargeting procedures. Creating automated QoR checks for implementation quality control.
• Supervise, inspect and provide design support for the team as a lead
• Implementation of DFTMax, Siemens Tesssent flows
• Implementation of SSN, MBIST, OCC in IPs and SoC designs
• Scan and ATPG, on-chip test pattern compression and at-speed testing using PLL, memory BIST and repair, logic BIST, power-gating, on-chip debug
• DFT (STA) Constraining development and analysis for DFT modes and SDF simulations.
• Analysing reports
• Work with designers on STA, physical, power and logical issues
• Work with Test Engineers to bring up test vectors on silicon